---
id: CVE-2024-42279
title: 'spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer'
summary: |-
  In the Linux kernel, the following vulnerability has been resolved:

  spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer

  While transmitting with rx_len == 0, the RX FIFO is not going to be
  emptied in the interru…
severity: high
cvss: 7.8
cvssVector: 'CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H'
cvssSource: cna
vendor: Linux
product: Linux
affected:
  - >-
    Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd <
    950375a0ba7d6c82ea5b5a44dd48a9e41fa45826
  - >-
    Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd <
    3feda3677e8bbe833c3a62a4091377a08f015b80
  - >-
    Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd <
    45e03d35229b680b79dfea1103a1f2f07d0b5d75
  - >-
    Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd <
    9cf71eb0faef4bff01df4264841b8465382d7927
  - Linux 6.0
ssvc:
  exploitation: none
  automatable: 'no'
  technicalImpact: partial
  timestamp: '2024-09-10T16:11:42.802690Z'
published: '2024-08-17'
updated: '2026-10-30'
sourceUpdated: '2026-10-30T12:19:01.283Z'
source: CVEORG
sourceUrl: 'https://www.cve.org/CVERecord?id=CVE-2024-42279'
references:
  - url: 'https://git.kernel.org/stable/c/950375a0ba7d6c82ea5b5a44dd48a9e41fa45826'
  - url: 'https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80'
  - url: 'https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75'
  - url: 'https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927'
tags:
  - cve.org
epss: 0.00234
epssPercentile: 0.14384
ingestedAt: '2026-11-03T13:45:42.685Z'
---

## Overview

In the Linux kernel, the following vulnerability has been resolved:

spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer

While transmitting with rx_len == 0, the RX FIFO is not going to be
emptied in the interrupt handler. A subsequent transfer could then
read crap from the previous transfer out of the RX FIFO into the
start RX buffer. The core provides a register that will empty the RX and
TX FIFOs, so do that before each transfer.

## Affected

- `Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd < 950375a0ba7d6c82ea5b5a44dd48a9e41fa45826`
- `Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd < 3feda3677e8bbe833c3a62a4091377a08f015b80`
- `Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd < 45e03d35229b680b79dfea1103a1f2f07d0b5d75`
- `Linux >= 9ac8d17694b66d54b13e9718b25c14ca36dbebbd < 9cf71eb0faef4bff01df4264841b8465382d7927`
- `Linux 6.0`

## Remediation

Refer to the linked advisories for vendor-supplied fixes and affected version ranges.